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Preliminary
Notice: This is not a final specification. Some parametric limits are subject to change.
Renesas LSIs
M6MGB/T33BS8BWG
33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS FLASH MEMORY 8,388,608-BIT (524,288-WORD BY 16-BIT) CMOS SRAM Stacked-CSP (Chip Scale Package) &
Description
The M6MGB/T33BS8BWG is a Stacked Chip Scale Package The M6MGB/T33BS8BWG is suitable for a high performance cellular phone and a mobile PC that are required to be small (S-CSP) that contents 32M-bit Flash memory and 8M-bit mounting area, weight and small power dissipation. SRAM in a 66-pin Stacked CSP for lead free use. 32M-bit Flash memory is a 2,097,152 words, single power supply and high performance non-volatile memory fabricated by CMOS technology for the peripheral circuit and DINOR (Divided bit-line NOR) architecture for the memory cell. All memory blocks are locked and can not be programmed or erased, when F-WP# is Low. Using Software Lock Release function, program or erase operation can be executed. 8M-bit SRAM is a 524,288 words asynchronous SRAM fabricated by CMOS technology.
Features
Access Time Flash SRAM 70ns (Max.) 85ns (Max.) F-VCC =VCC=2.7 ~ 3.0V Ta=-40 ~ 85 C 66 pin S-CSP Ball pitch 0.80mm Outer-ball:Sn - Ag-Cu
Supply Voltage Ambient Temperature Package
Application
Mobile communication products
PIN CONFIGURATION (TOP VIEW)
INDEX(Laser Marking)
A B C D E
NC NC NC A5 A4 A0
F-CE#
NC NC A18 A17 A7 A6 A3 A2 A1
S-CE1# S-LB# F-WP# S-GND F-WE#
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A16 A8
F-A20 S-UB#
NC
F-RP#
F-RY/BY#
A11 A15 A14 A13
S-OE#
F-A19
A10 A9
DQ12 DQ13 DQ15
11.0 mm
F G H J K L M
DQ11
DQ9 DQ8 DQ0 DQ1
DQ10
F-GND
S-CE2
DQ6 DQ4 DQ5
S-WE#
A12
F-GND
F-OE#
DQ2 DQ3
S-VCC
DQ14
NC NC NC
F-VCC
DQ7
NC NC NC
NC:Non Connection
1 2 3 4 5 6 7 8
8.0 mm F-VCC S-VCC F-GND S-GND A0-A18 F-A19-F-A20 DQ0-DQ15 F-CE# S-CE1# S-CE2 : VCC for Flash Memory : VCC for SRAM : GND for Flash Memory : GND for SRAM : Common address for Flash/SRAM : Address for Flash : Data I/O : Flash chip enable : SRAM chip enable1 : SRAM chip enable2 F-OE# S-OE# F-WE# S-WE# F-WP# F-RP# F-RY/BY# S-LB# S-UB# :Output enable for Flash :Output enable for SRAM :Write enable for Flash :Write enable for SRAM :Write protect for Flash :Reset power down for Flash :Flash Ready/Busy :Lower byte control for SRAM :Upper byte control for SRAM
1
Rev.0.1_48a_bebz
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Preliminary
Notice: This is not a final specification. Some parametric limits are subject to change.
Renesas LSIs
M6MGB/T33BS8BWG
33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS FLASH MEMORY 8,388,608-BIT (524,288-WORD BY 16-BIT) CMOS SRAM Stacked-CSP (Chip Scale Package) &
MCP Block Diagram
F-Vcc
F-GND
A0 to A20 A0 to A20 F-CE# F-WP# F-RP# F-WE# F-OE#
32Mbit DINOR Flash Memory
F-RY/BY#
DQ0 to DQ15 S-Vcc S-GND
S-WE# S-OE# S-UB# S-LB# S-CE1# S-CE2
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A0 to A18 8Mbit SRAM
Note: In the data sheet there are "VCC"s which mean "F-VCC". In the SRAM part there are "UB#" and "LB#" which mean "S-UB#" and "S-LB#", respectively.
Capacitance
Symbol Parameter Conditions Min. Limits Typ. Max. 18 Unit
A20-A0, F-OE#, S-OE#,F-WE#, S-WE#,FInput capacitance CE#, F-WP#, F-RP#, S-CE1#, S-CE2, S-LB#, Ta=25C, f=1MHz, S-UB# Vin=Vout=0V Output COUT DQ15-DQ0,F-RY/BY# Capacitance
CIN
pF
22
pF
2
Rev.0.1_48a_bebz
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Preliminary
Notice: This is not a final specification. Some parametric limits are subject to change.
Renesas LSIs
M6MGB/T33BS8BWG
33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS FLASH MEMORY 8,388,608-BIT (524,288-WORD BY 16-BIT) CMOS SRAM Stacked-CSP (Chip Scale Package) &
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Nippon Bldg.,6-2,Otemachi 2-chome,Chiyoda-ku,Tokyo,100-0004 Japan
Keep safety first in your circuit designs!
* Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxilia ry circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
* These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corporation or a third party. * Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third -party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. * All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracie s or typographical errors. Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corporation by various means, including the Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). * When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contain ed herein. * Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please conta ct Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. * The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials. * If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. * Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. * Please contact Renesas Technology Corporation for further details on these materials or the products contained therein.
REJ03C0211-0010Z (c) 2003 Renesas Technology Corp. New publication, effective April 2003. Specifications subject to change without notice
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